{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9691866","patent":{"patent_number":"US-9691866","title":"Memory cell having a vertical selection gate formed in an FDSOI substrate","assignee":null,"inventors":[],"filing_date":"2016-08-30T00:00:00.000Z","publication_date":"2017-06-27T00:00:00.000Z","cpc_codes":["G11C"],"num_claims":20,"abstract":"A memory cell formed in a semiconductor substrate, includes a selection gate extending vertically in a trench made in the substrate, and isolated from the substrate by a first layer of gate oxide, a horizontal floating gate extending above the substrate and isolated from the substrate by a second layer of gate oxide, and a horizontal control gate extending above the floating gate. The selection gate covers a lateral face of the floating gate. The floating gate is separated from the selection gate only by the first layer of gate oxide, and separated from a vertical channel region, extending in the substrate along the selection gate, only by the second layer of gate oxide."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory cell having a vertical selection gate formed in an FDSOI substrate","description":"A memory cell formed in a semiconductor substrate, includes a selection gate extending vertically in a trench made in the substrate, and isolated from the substrate by a first layer of gate oxide, a h","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9691866","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9691866","citation_suggestion":"Patentable. \"Memory cell having a vertical selection gate formed in an FDSOI substrate\" (US-9691866). https://patentable.app/patents/US-9691866","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9691866","json":"https://patentable.app/api/llm-context/US-9691866","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T09:03:29.225Z"}