{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9697174","patent":{"patent_number":"US-9697174","title":"Efficient hardware instructions for processing bit vectors for single instruction multiple data processors","assignee":null,"inventors":[],"filing_date":"2013-09-10T00:00:00.000Z","publication_date":"2017-07-04T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F"],"num_claims":26,"abstract":"A method and apparatus for efficiently processing data in various formats in a single instruction multiple data (“SIMD”) architecture is presented. Specifically, a method to unpack a fixed-width bit values in a bit stream to a fixed width byte stream in a SIMD architecture is presented. A method to unpack variable-length byte packed values in a byte stream in a SIMD architecture is presented. A method to decompress a run length encoded compressed bit-vector in a SIMD architecture is presented. A method to return the offset of each bit set to one in a bit-vector in a SIMD architecture is presented. A method to fetch bits from a bit-vector at specified offsets relative to a base in a SIMD architecture is presented. A method to compare values stored in two SIMD registers is presented."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Efficient hardware instructions for processing bit vectors for single instruction multiple data processors","description":"A method and apparatus for efficiently processing data in various formats in a single instruction multiple data (“SIMD”) architecture is presented. Specifically, a method to unpack a fixed-width bit v","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9697174","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9697174","citation_suggestion":"Patentable. \"Efficient hardware instructions for processing bit vectors for single instruction multiple data processors\" (US-9697174). https://patentable.app/patents/US-9697174","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9697174","json":"https://patentable.app/api/llm-context/US-9697174","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T10:57:55.811Z"}