{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9697890","patent":{"patent_number":"US-9697890","title":"Memory and interface circuit for bit line of memory","assignee":null,"inventors":[],"filing_date":"2016-06-01T00:00:00.000Z","publication_date":"2017-07-04T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"An interface circuit is provided. A NMOS transistor is coupled between a first bit line and a ground. A logic gate is coupled between a gate of the NMOS transistor and a second bit line. A keeper controls a voltage level of the second bit line according to a reference voltage. A tracking circuit includes a plurality of reference bit cells and a pull-up device coupled to a reference bit line. Each reference bit cell is coupled to a read word line. When a bit cell coupled to the second bit line is accessed by a specific read word line, the reference bit cell coupled to the specific read word line drains a current from the pull-up device. The tracking circuit provides the reference voltage according to the current."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory and interface circuit for bit line of memory","description":"An interface circuit is provided. A NMOS transistor is coupled between a first bit line and a ground. A logic gate is coupled between a gate of the NMOS transistor and a second bit line. A keeper cont","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9697890","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9697890","citation_suggestion":"Patentable. \"Memory and interface circuit for bit line of memory\" (US-9697890). https://patentable.app/patents/US-9697890","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9697890","json":"https://patentable.app/api/llm-context/US-9697890","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T14:41:40.369Z"}