{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9703905","patent":{"patent_number":"US-9703905","title":"Method and system for simulating multiple processors in parallel and scheduler","assignee":null,"inventors":[],"filing_date":"2013-12-27T00:00:00.000Z","publication_date":"2017-07-11T00:00:00.000Z","cpc_codes":["G06F","G06F"],"num_claims":20,"abstract":"The present invention provides a method and a system for simulating multiple processors in parallel, and a scheduler. In this embodiment, the scheduler maps debug interface information of a to-be-simulated processor requiring debugging onto the scheduler during parallel simulation of multiple processors, so that the scheduler is capable of debugging, by using a master thread, the to-be-simulated processor requiring debugging via a debug interface of the to-be-simulated processor requiring debugging pointed by the debug interface information, thereby implementing debugging during parallel simulation of multiple processors."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method and system for simulating multiple processors in parallel and scheduler","description":"The present invention provides a method and a system for simulating multiple processors in parallel, and a scheduler. In this embodiment, the scheduler maps debug interface information of a to-be-simu","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9703905","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9703905","citation_suggestion":"Patentable. \"Method and system for simulating multiple processors in parallel and scheduler\" (US-9703905). https://patentable.app/patents/US-9703905","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9703905","json":"https://patentable.app/api/llm-context/US-9703905","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T08:59:52.792Z"}