{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9704969","patent":{"patent_number":"US-9704969","title":"Fin semiconductor device having multiple gate width structures","assignee":null,"inventors":[],"filing_date":"2015-12-31T00:00:00.000Z","publication_date":"2017-07-11T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":16,"abstract":"A semiconductor device including a substrate, a plurality of insulators, a dielectric layer and a plurality of gates is provided. The substrate includes a plurality of trenches and a semiconductor fin between trenches. The insulators are disposed in the trenches. The dielectric layer covers the semiconductor fin and the insulators. A lengthwise direction of the gates is different from a lengthwise direction of the semiconductor fin. The gates comprise at least one first gate that is penetrated by the semiconductor fin and at least one second gate that is not penetrated through by the semiconductor fin. The second gate comprises a broadened portion disposed on the dielectric layer and a top portion disposed on the broadened portion, wherein a bottom width of the broadened portion is greater than a width of the top portion."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Fin semiconductor device having multiple gate width structures","description":"A semiconductor device including a substrate, a plurality of insulators, a dielectric layer and a plurality of gates is provided. The substrate includes a plurality of trenches and a semiconductor fin","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9704969","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9704969","citation_suggestion":"Patentable. \"Fin semiconductor device having multiple gate width structures\" (US-9704969). https://patentable.app/patents/US-9704969","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9704969","json":"https://patentable.app/api/llm-context/US-9704969","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T05:35:48.696Z"}