{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9710389","patent":{"patent_number":"US-9710389","title":"Method and apparatus for memory aliasing detection in an out-of-order instruction execution platform","assignee":null,"inventors":[],"filing_date":"2015-03-10T00:00:00.000Z","publication_date":"2017-07-18T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":24,"abstract":"A processor and method are described for alias detection. For example, one embodiment of an apparatus comprises: reordering logic to receive a set of read and write operations in a program order and to responsively reorder the read and write operations; adjustment information attachment logic to associate adjustment information with one or more of the set of read and write operations, wherein for a read operation the adjustment information is to indicate a number of write operations which the read operation has bypassed and for a write operation the adjustment information is to indicate a number of read operations which have bypassed the write operation; and out-of-order processing logic to determine whether execution of the reordered read and write operations will result in a conflict based, at least in part, on the adjustment information associated with the one or more reads and writes."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method and apparatus for memory aliasing detection in an out-of-order instruction execution platform","description":"A processor and method are described for alias detection. For example, one embodiment of an apparatus comprises: reordering logic to receive a set of read and write operations in a program order and t","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9710389","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9710389","citation_suggestion":"Patentable. \"Method and apparatus for memory aliasing detection in an out-of-order instruction execution platform\" (US-9710389). https://patentable.app/patents/US-9710389","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9710389","json":"https://patentable.app/api/llm-context/US-9710389","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T07:23:24.088Z"}