{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9710580","patent":{"patent_number":"US-9710580","title":"Timing analysis method for digital circuit design and system thereof","assignee":null,"inventors":[],"filing_date":"2015-07-06T00:00:00.000Z","publication_date":"2017-07-18T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F"],"num_claims":15,"abstract":"A timing analysis method for a digital circuit design, a system and a computer readable storage media thereof are provided. The timing analysis method includes following steps. An integrated circuit (IC) design is obtained, wherein the IC is operated in a plurality of operating modes. A plurality of extracted timing models (ETMs) are respectively generated according to the operating modes of the IC design, wherein each of the ETMs includes a none on-chip variation (NOCV) part and an on-chip variation (OCV) part. The ETMs corresponding to the operating modes are integrated into a NOCV ETM and an OCV ETM, wherein the OCV part of the operating modes is not considered when the NOCV ETM is generated. And, a timing checking of the IC design is analyzed according to the NOCV ETM and the OCV ETM."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Timing analysis method for digital circuit design and system thereof","description":"A timing analysis method for a digital circuit design, a system and a computer readable storage media thereof are provided. The timing analysis method includes following steps. An integrated circuit (","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9710580","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9710580","citation_suggestion":"Patentable. \"Timing analysis method for digital circuit design and system thereof\" (US-9710580). https://patentable.app/patents/US-9710580","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9710580","json":"https://patentable.app/api/llm-context/US-9710580","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T04:09:03.302Z"}