{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9710592","patent":{"patent_number":"US-9710592","title":"Multiple-depth trench interconnect technology at advanced semiconductor nodes","assignee":null,"inventors":[],"filing_date":"2015-10-14T00:00:00.000Z","publication_date":"2017-07-18T00:00:00.000Z","cpc_codes":["G06F","G06F","H01L","H01L","H01L","H01L"],"num_claims":10,"abstract":"A metal interconnect structure, a system and method of manufacture, wherein a design layout includes results in forming at least two trenches of different trench depths. The method uses a slightly modified BEOL processing stack to prevent metal interconnect structures from encroaching upon an underlying hard mask dielectric or metallic hard mask layer. Thus two trench depths are obtained by tuning parameters of the system and allowing areas exposed by two masks to have deeper trenches. Here, the BEOL Stack processing is modified to enable two trench depths by using a hardmask that defines the lowest etch depth. The design may be optimized by software which optimizes a design for electromigration (or setup timing violations) by utilizing secondary trench depths, checking space opportunity around wires, pushing wires out to generate space and converting a wire to deep trench wire."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Multiple-depth trench interconnect technology at advanced semiconductor nodes","description":"A metal interconnect structure, a system and method of manufacture, wherein a design layout includes results in forming at least two trenches of different trench depths. The method uses a slightly mod","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9710592","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9710592","citation_suggestion":"Patentable. \"Multiple-depth trench interconnect technology at advanced semiconductor nodes\" (US-9710592). https://patentable.app/patents/US-9710592","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9710592","json":"https://patentable.app/api/llm-context/US-9710592","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T07:00:21.612Z"}