{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9711524","patent":{"patent_number":"US-9711524","title":"Three-dimensional memory device containing plural select gate transistors having different characteristics and method of making thereof","assignee":null,"inventors":[],"filing_date":"2015-01-13T00:00:00.000Z","publication_date":"2017-07-18T00:00:00.000Z","cpc_codes":["H01L","H01L"],"num_claims":31,"abstract":"A stack of material layers includes first material layers, second material layers located between a respective pair of an overlying first material layer and an underlying first material layer, and at least one temporary material layer located between a respective pair of an overlying first material layer and an underlying first material layer. After formation of a memory opening and a memory stack structure, at least one first backside recess is formed by removing the at least one temporary material layer and adjoining portions of a memory film. A physically exposed portion of a semiconductor channel is doped with electrical dopants to form a doped semiconductor channel portion. Second backside cavities are formed by removal of the second material layers. The backside cavities are then filled with a dielectric liner and electrically conductive layers, such as select and control gate electrodes of a memory device."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Three-dimensional memory device containing plural select gate transistors having different characteristics and method of making thereof","description":"A stack of material layers includes first material layers, second material layers located between a respective pair of an overlying first material layer and an underlying first material layer, and at ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9711524","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9711524","citation_suggestion":"Patentable. \"Three-dimensional memory device containing plural select gate transistors having different characteristics and method of making thereof\" (US-9711524). https://patentable.app/patents/US-9711524","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9711524","json":"https://patentable.app/api/llm-context/US-9711524","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T10:15:32.757Z"}