{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9712189","patent":{"patent_number":"US-9712189","title":"Error correction capability improvement in the presence of hard bit errors","assignee":null,"inventors":[],"filing_date":"2014-10-29T00:00:00.000Z","publication_date":"2017-07-18T00:00:00.000Z","cpc_codes":["G06F"],"num_claims":17,"abstract":"A soft output detector is programmed with a first set of parameters. Soft information is generated according to the first set of parameters, including likelihood information that spans a maximum likelihood range. Error correction decoding is performed on the soft information generated according to the first set of parameters. In the event decoding is unsuccessful, the soft output detector is programmed with a second set of parameters, soft information according is generated to the second set of parameters (including likelihood information that is scaled down from the maximum likelihood range), and error correction decoding is performed on the soft information generated according to the second set of parameters."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Error correction capability improvement in the presence of hard bit errors","description":"A soft output detector is programmed with a first set of parameters. Soft information is generated according to the first set of parameters, including likelihood information that spans a maximum likel","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9712189","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9712189","citation_suggestion":"Patentable. \"Error correction capability improvement in the presence of hard bit errors\" (US-9712189). https://patentable.app/patents/US-9712189","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9712189","json":"https://patentable.app/api/llm-context/US-9712189","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T09:35:21.476Z"}