{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9715912","patent":{"patent_number":"US-9715912","title":"Source synchronous clock generation circuits and methods for a system on a chip (SOC) data processing system","assignee":null,"inventors":[],"filing_date":"2015-04-27T00:00:00.000Z","publication_date":"2017-07-25T00:00:00.000Z","cpc_codes":["G11C","G06F","G11C"],"num_claims":17,"abstract":"An integrated circuit device comprises a first data processing element having a first data interface configured to synchronously communicate data according to a first clock signal at a first clock speed, and a second data interface configured to synchronously communicate data at a second clock speed lower than the first clock speed; and a second data processing element configured to operate in response to a second clock signal at the second clock speed and to synchronously communicate data with the first data processing element via the second data interface according to the second clock speed; the first data processing element being configured to derive, from a source clock signal, the first clock signal and the second clock signal; and the first data processing element and the second data processing element each comprising a clock signal interface by which the second clock signal is provided by the first data processing element to the second data processing element."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Source synchronous clock generation circuits and methods for a system on a chip (SOC) data processing system","description":"An integrated circuit device comprises a first data processing element having a first data interface configured to synchronously communicate data according to a first clock signal at a first clock spe","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9715912","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9715912","citation_suggestion":"Patentable. \"Source synchronous clock generation circuits and methods for a system on a chip (SOC) data processing system\" (US-9715912). https://patentable.app/patents/US-9715912","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9715912","json":"https://patentable.app/api/llm-context/US-9715912","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T13:17:15.419Z"}