{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9716086","patent":{"patent_number":"US-9716086","title":"Method and structure for forming buried ESD with FinFETs","assignee":null,"inventors":[],"filing_date":"2016-06-16T00:00:00.000Z","publication_date":"2017-07-25T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":10,"abstract":"A semiconductor structure is provided that includes an electrostatic discharge (ESD) device integrated on the same semiconductor substrate as semiconductor fin field effect transistors (FinFETs). The ESD device includes a three-dimension (3D) wrap-around PN diode connected to the semiconductor substrate. The three-dimension (3D) wrap-around PN diode has an increased junction area and, in some applications, improved heat dissipation."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method and structure for forming buried ESD with FinFETs","description":"A semiconductor structure is provided that includes an electrostatic discharge (ESD) device integrated on the same semiconductor substrate as semiconductor fin field effect transistors (FinFETs). The ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9716086","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9716086","citation_suggestion":"Patentable. \"Method and structure for forming buried ESD with FinFETs\" (US-9716086). https://patentable.app/patents/US-9716086","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9716086","json":"https://patentable.app/api/llm-context/US-9716086","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T10:22:32.349Z"}