{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9716092","patent":{"patent_number":"US-9716092","title":"Semiconductor device with surrounding gate transistors in a NAND circuit","assignee":null,"inventors":[],"filing_date":"2016-10-27T00:00:00.000Z","publication_date":"2017-07-25T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":5,"abstract":"A semiconductor device employs surrounding gate transistors (SGTs) which are vertical transistors to constitute a CMOS NAND circuit. The NAND circuit is formed by using a plurality of MOS transistors arranged in m rows and n columns. The MOS transistors constituting the NAND circuit are formed on a planar silicon layer disposed on a substrate, and each have a structure in which a drain, a gate, and a source are arranged in a vertical direction, the gate surrounding a silicon pillar. The planar silicon layer includes a first active region having a first conductivity type and a second active region having a second conductivity type. The first active region and the second active region are connected to one another via a silicon layer formed on a surface of the planar silicon layer. This provides for a semiconductor device that constitutes a NAND circuit."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor device with surrounding gate transistors in a NAND circuit","description":"A semiconductor device employs surrounding gate transistors (SGTs) which are vertical transistors to constitute a CMOS NAND circuit. The NAND circuit is formed by using a plurality of MOS transistors ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9716092","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9716092","citation_suggestion":"Patentable. \"Semiconductor device with surrounding gate transistors in a NAND circuit\" (US-9716092). https://patentable.app/patents/US-9716092","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9716092","json":"https://patentable.app/api/llm-context/US-9716092","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T10:58:10.217Z"}