{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9720713","patent":{"patent_number":"US-9720713","title":"Using hardware transactional memory for implementation of queue operations","assignee":null,"inventors":[],"filing_date":"2016-05-02T00:00:00.000Z","publication_date":"2017-08-01T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":12,"abstract":"Using hardware transactional memory (HTM) for queue operations includes invoking a first operation for a concurrent linked queue of an interpretive program using a Just-In-Time (JIT) compiler of a virtual machine, wherein the first operation does not use HTM, determining whether a data processing system executing the virtual machine supports HTM, and responsive to determining that the data processing system does support HTM, detecting, using a processor and within the first operation, a call to a second operation that is that is configured, in byte code, to return an indication of a failed hardware transaction. Responsive to detecting the second operation, a machine code implementation of the first operation that includes a machine code implementation of the second operation is generated. The machine code implementation of the second operation is an implementation of the first operation that does use HTM."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Using hardware transactional memory for implementation of queue operations","description":"Using hardware transactional memory (HTM) for queue operations includes invoking a first operation for a concurrent linked queue of an interpretive program using a Just-In-Time (JIT) compiler of a vir","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9720713","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9720713","citation_suggestion":"Patentable. \"Using hardware transactional memory for implementation of queue operations\" (US-9720713). https://patentable.app/patents/US-9720713","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9720713","json":"https://patentable.app/api/llm-context/US-9720713","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T06:23:07.331Z"}