{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9720861","patent":{"patent_number":"US-9720861","title":"Memory access by dual processor systems","assignee":null,"inventors":[],"filing_date":"2014-12-02T00:00:00.000Z","publication_date":"2017-08-01T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F"],"num_claims":20,"abstract":"Methods and apparatus for control access to memory in dual-processor. In particular, there are disclosed methods and apparatus for use where a single memory is shared for instructions for the processors and a data store to reduce conflicts between access requirements."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory access by dual processor systems","description":"Methods and apparatus for control access to memory in dual-processor. In particular, there are disclosed methods and apparatus for use where a single memory is shared for instructions for the processo","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9720861","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9720861","citation_suggestion":"Patentable. \"Memory access by dual processor systems\" (US-9720861). https://patentable.app/patents/US-9720861","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9720861","json":"https://patentable.app/api/llm-context/US-9720861","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T11:23:37.439Z"}