{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9721054","patent":{"patent_number":"US-9721054","title":"Building a corner model of interconnect wire resistance","assignee":null,"inventors":[],"filing_date":"2015-12-11T00:00:00.000Z","publication_date":"2017-08-01T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F"],"num_claims":20,"abstract":"One embodiment provides a method of building a wire resistance corner model for an interconnect metal level in a semiconductor device. The method comprises determining nominal on-wafer widths and wire thicknesses at minimum and maximum design widths of the interconnect metal level, and determining standard deviations for global variations in on-wafer width and wire thickness. The method further comprises determining maximum and minimum statistical corner values for interconnect wire resistance. A first corner solution that minimizes a maximum absolute difference between a model corner value and a statistical corner value of the maximum statistical corner values is computed. A second corner solution that minimizes a maximum absolute difference between a model corner value and a statistical corner value of the minimum statistical corner values is computed."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Building a corner model of interconnect wire resistance","description":"One embodiment provides a method of building a wire resistance corner model for an interconnect metal level in a semiconductor device. The method comprises determining nominal on-wafer widths and wire","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9721054","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9721054","citation_suggestion":"Patentable. \"Building a corner model of interconnect wire resistance\" (US-9721054). https://patentable.app/patents/US-9721054","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9721054","json":"https://patentable.app/api/llm-context/US-9721054","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T07:43:51.920Z"}