{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9721513","patent":{"patent_number":"US-9721513","title":"NAND gate latched driving circuit and NAND gate latched shift register","assignee":null,"inventors":[],"filing_date":"2015-01-28T00:00:00.000Z","publication_date":"2017-08-01T00:00:00.000Z","cpc_codes":["G09G","G09G","G11C","G09G","G09G","G09G","G09G"],"num_claims":14,"abstract":"The invention provides a NAND gate latched driving circuit and a NAND gate latched shift register. The NAND gate latched driving circuit includes multiple cascade connected shift register circuits, each of the shift register circuits including a clock control transmission circuit and a NAND gate latch circuit. The clock control transmission circuit is triggered by a first clock pulse of a clock signal to transmit a driving pulse of a former stage to the NAND gate latch circuit, the driving pulse then is latched by the NAND gate latch circuit. The NAND gate latch circuit further is triggered by a subsequent second clock pulse of a first clock signal to output the latched driving pulse. By the above solution, the NAND gate latched driving circuit of the invention is suitable for CMOS process and can achieve low power consumption and wide noise tolerance."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"NAND gate latched driving circuit and NAND gate latched shift register","description":"The invention provides a NAND gate latched driving circuit and a NAND gate latched shift register. The NAND gate latched driving circuit includes multiple cascade connected shift register circuits, ea","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9721513","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9721513","citation_suggestion":"Patentable. \"NAND gate latched driving circuit and NAND gate latched shift register\" (US-9721513). https://patentable.app/patents/US-9721513","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9721513","json":"https://patentable.app/api/llm-context/US-9721513","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T06:42:56.432Z"}