{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9721624","patent":{"patent_number":"US-9721624","title":"Memory with multiple write ports","assignee":null,"inventors":[],"filing_date":"2014-12-23T00:00:00.000Z","publication_date":"2017-08-01T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C"],"num_claims":19,"abstract":"A memory 2 includes a regular array of storage elements 4. A regular array of write multiplexers 8 is provided outside of the regular array of storage elements 4. The storage element pitch is matched to the write multiplexer pitch. The write multiplexers 10 support a plurality of write ports. When forming a memory design 2, a given instance of an array of write multiplexers 8 may be selected in dependence upon the desired number of write ports to support and this combined with a common form of storage element array 4. "},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory with multiple write ports","description":"A memory 2 includes a regular array of storage elements 4. A regular array of write multiplexers 8 is provided outside of the regular array of storage elements 4. The storage element pitch is matched ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9721624","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9721624","citation_suggestion":"Patentable. \"Memory with multiple write ports\" (US-9721624). https://patentable.app/patents/US-9721624","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9721624","json":"https://patentable.app/api/llm-context/US-9721624","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T07:32:31.568Z"}