{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9721642","patent":{"patent_number":"US-9721642","title":"Memory component with pattern register circuitry to provide data patterns for calibration","assignee":null,"inventors":[],"filing_date":"2016-05-16T00:00:00.000Z","publication_date":"2017-08-01T00:00:00.000Z","cpc_codes":["G11C","G06F","G06F","G06F","G06F","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","H04L","G11C","H04L","H04L","H04L"],"num_claims":20,"abstract":"A memory component includes a memory core comprising dynamic random access memory (DRAM) storage cells and a first circuit to receive external commands. The external commands include a read command that specifies transmitting data accessed from the memory core. The memory component also includes a second circuit to transmit data onto an external bus in response to a read command and pattern register circuitry operable during calibration to provide at least a first data pattern and a second data pattern. During the calibration, a selected one of the first data pattern and the second data pattern is transmitted by the second circuit onto the external bus in response to a read command received during the calibration. Further, at least one of the first and second data patterns is written to the pattern register circuitry in response to a write command received during the calibration."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory component with pattern register circuitry to provide data patterns for calibration","description":"A memory component includes a memory core comprising dynamic random access memory (DRAM) storage cells and a first circuit to receive external commands. The external commands include a read command th","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9721642","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9721642","citation_suggestion":"Patentable. \"Memory component with pattern register circuitry to provide data patterns for calibration\" (US-9721642). https://patentable.app/patents/US-9721642","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9721642","json":"https://patentable.app/api/llm-context/US-9721642","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T12:33:02.434Z"}