{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9721666","patent":{"patent_number":"US-9721666","title":"Memory system","assignee":null,"inventors":[],"filing_date":"2016-06-06T00:00:00.000Z","publication_date":"2017-08-01T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":16,"abstract":"A memory system includes a semiconductor memory device having memory cells arranged in rows and columns, and a controller configured to issue a write command with or without a partial page program command to the semiconductor memory device. The semiconductor memory device, in response to the write command issued without the partial page command, executes a first program operation on a page of memory cells and then a first verify operation on the memory cells of the page using a first verify voltage for all of the memory cells of the page, and in response to the write command issued with the partial page command, executes a second program operation on a subset of the memory cells of the page and then a second verify operation on the memory cells of the subset using one of several different second verify voltages corresponding to the subset."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory system","description":"A memory system includes a semiconductor memory device having memory cells arranged in rows and columns, and a controller configured to issue a write command with or without a partial page program com","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9721666","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9721666","citation_suggestion":"Patentable. \"Memory system\" (US-9721666). https://patentable.app/patents/US-9721666","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9721666","json":"https://patentable.app/api/llm-context/US-9721666","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T04:31:21.669Z"}