{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9721962","patent":{"patent_number":"US-9721962","title":"Integration of a memory transistor into high-k, metal gate CMOS process flow","assignee":null,"inventors":[],"filing_date":"2016-03-25T00:00:00.000Z","publication_date":"2017-08-01T00:00:00.000Z","cpc_codes":["H01L","H01L"],"num_claims":19,"abstract":"Memory cells including embedded SONOS based non-volatile memory (NVM) and MOS transistors and methods of forming the same are described. Generally, the method includes: forming a gate stack of a NVM transistor in a NVM region of a substrate including the NVM region and a plurality of MOS regions; and depositing a high-k dielectric material over the gate stack of the NVM transistor and the plurality of MOS regions to concurrently form a blocking dielectric comprising the high-k dielectric material in the gate stack of the NVM transistor and high-k gate dielectrics in the plurality of MOS regions. In one embodiment, a first metal layer is deposited over the high-k dielectric material and patterned to concurrently form a metal gate over the gate stack of the NVM transistor, and a metal gate of a field effect transistor in one of the MOS regions."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Integration of a memory transistor into high-k, metal gate CMOS process flow","description":"Memory cells including embedded SONOS based non-volatile memory (NVM) and MOS transistors and methods of forming the same are described. Generally, the method includes: forming a gate stack of a NVM t","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9721962","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9721962","citation_suggestion":"Patentable. \"Integration of a memory transistor into high-k, metal gate CMOS process flow\" (US-9721962). https://patentable.app/patents/US-9721962","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9721962","json":"https://patentable.app/api/llm-context/US-9721962","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T07:42:30.563Z"}