{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9727483","patent":{"patent_number":"US-9727483","title":"Tracking memory accesses when invalidating effective address to real address translations","assignee":null,"inventors":[],"filing_date":"2015-06-01T00:00:00.000Z","publication_date":"2017-08-08T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F"],"num_claims":7,"abstract":"According to embodiments of the present disclosure, a method for invalidating an address translation entry in an effective address to real address translation table (ERAT) for a computer memory can include receiving a first invalidation request. According to some embodiments, the method may also include determining that a first entry in the ERAT corresponds with the first invalidation request, wherein the ERAT has a plurality of entries, each entry in the plurality of entries having an indicator. In particular embodiments, the method may then determine that a first indicator associated with the first entry indicates that the first entry is not being used by any of a plurality of memory access entities (MAE), wherein a first MAE can concurrently use a same entry as a second MAE. The first entry may then be invalidated in response to determining that the first entry is not being used."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Tracking memory accesses when invalidating effective address to real address translations","description":"According to embodiments of the present disclosure, a method for invalidating an address translation entry in an effective address to real address translation table (ERAT) for a computer memory can in","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9727483","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9727483","citation_suggestion":"Patentable. \"Tracking memory accesses when invalidating effective address to real address translations\" (US-9727483). https://patentable.app/patents/US-9727483","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9727483","json":"https://patentable.app/api/llm-context/US-9727483","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T07:14:14.507Z"}