{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9728649","patent":{"patent_number":"US-9728649","title":"Semiconductor device including embedded crystalline back-gate bias planes, related design structure and method of fabrication","assignee":null,"inventors":[],"filing_date":"2016-01-29T00:00:00.000Z","publication_date":"2017-08-08T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":17,"abstract":"A semiconductor device is disclosed. The semiconductor device can include a first dielectric layer disposed on a substrate; a set of bias lines disposed on the first dielectric layer; a second dielectric layer disposed on the first dielectric layer and between the set of bias lines, wherein a thickness of the second dielectric layer is less than a thickness of the first dielectric layer; a patterned semiconductor layer disposed on portions of the second dielectric layer; and a set of devices disposed on the patterned semiconductor layer above the set of bias lines."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor device including embedded crystalline back-gate bias planes, related design structure and method of fabrication","description":"A semiconductor device is disclosed. The semiconductor device can include a first dielectric layer disposed on a substrate; a set of bias lines disposed on the first dielectric layer; a second dielect","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9728649","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9728649","citation_suggestion":"Patentable. \"Semiconductor device including embedded crystalline back-gate bias planes, related design structure and method of fabrication\" (US-9728649). https://patentable.app/patents/US-9728649","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9728649","json":"https://patentable.app/api/llm-context/US-9728649","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T03:56:49.924Z"}