{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9733944","patent":{"patent_number":"US-9733944","title":"Instruction sequence buffer to store branches having reliably predictable instruction sequences","assignee":null,"inventors":[],"filing_date":"2011-10-12T00:00:00.000Z","publication_date":"2017-08-15T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":21,"abstract":"A method for outputting reliably predictable instruction sequences. The method includes tracking repetitive hits to determine a set of frequently hit instruction sequences for a microprocessor, and out of that set, identifying a branch instruction having a series of subsequent frequently executed branch instructions that form a reliably predictable instruction sequence. The reliably predictable instruction sequence is stored into a buffer. On a subsequent hit to the branch instruction, the reliably predictable instruction sequence is output from the buffer."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Instruction sequence buffer to store branches having reliably predictable instruction sequences","description":"A method for outputting reliably predictable instruction sequences. The method includes tracking repetitive hits to determine a set of frequently hit instruction sequences for a microprocessor, and ou","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9733944","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9733944","citation_suggestion":"Patentable. \"Instruction sequence buffer to store branches having reliably predictable instruction sequences\" (US-9733944). https://patentable.app/patents/US-9733944","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9733944","json":"https://patentable.app/api/llm-context/US-9733944","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T13:15:48.819Z"}