{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9734033","patent":{"patent_number":"US-9734033","title":"Implementing processor functional verification by generating and running constrained random irritator tests for multiple processor system and processor core with multiple threads","assignee":null,"inventors":[],"filing_date":"2014-12-08T00:00:00.000Z","publication_date":"2017-08-15T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F"],"num_claims":11,"abstract":"A method and system are provided for implementing functional verification including generating and running constrained random irritator tests for a multiple processor system and for a processor core with multiple threads. Separate tests are generated, a main test for one thread, and an irritator test for each other thread in the configuration. The main test and each irritator test are saved and randomly mixed then combined together again, where the main thread is not forced to be generated with any particular irritator."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Implementing processor functional verification by generating and running constrained random irritator tests for multiple processor system and processor core with multiple threads","description":"A method and system are provided for implementing functional verification including generating and running constrained random irritator tests for a multiple processor system and for a processor core w","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9734033","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9734033","citation_suggestion":"Patentable. \"Implementing processor functional verification by generating and running constrained random irritator tests for multiple processor system and processor core with multiple threads\" (US-9734033). https://patentable.app/patents/US-9734033","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9734033","json":"https://patentable.app/api/llm-context/US-9734033","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T05:00:10.017Z"}