{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9734272","patent":{"patent_number":"US-9734272","title":"Techniques for generating physical layouts of in silico multi mode integrated circuits","assignee":null,"inventors":[],"filing_date":"2015-06-15T00:00:00.000Z","publication_date":"2017-08-15T00:00:00.000Z","cpc_codes":["G06F","G06F"],"num_claims":25,"abstract":"This disclosure relates generally to computerized systems and methods of producing a physical representation of an in silico Integrated Circuit (IC) having an in silico Multi-Mode Redundant (MMR) pipeline circuit. An IC layout of the in silico IC is initially generated with the electronic design automation (EDA) program. Multi-Mode Redundant Self-Correcting Sequential State Element (MMRSCSSE) layouts are then rendered immotile while initial redundant Combinational Logic Circuit (CLC) layouts are removed from the IC layout after the MMRSCSSE layouts have been rendered immotile. By first placing the MMRSCSSE layouts and then rendering them immotile, the remaining logic can be placed again and optimized without compromising critical node spacing. As such, the described method provides for a more efficient way to create the IC layout of the in silico IC while maintaining critical node spacing."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Techniques for generating physical layouts of in silico multi mode integrated circuits","description":"This disclosure relates generally to computerized systems and methods of producing a physical representation of an in silico Integrated Circuit (IC) having an in silico Multi-Mode Redundant (MMR) pipe","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9734272","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9734272","citation_suggestion":"Patentable. \"Techniques for generating physical layouts of in silico multi mode integrated circuits\" (US-9734272). https://patentable.app/patents/US-9734272","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9734272","json":"https://patentable.app/api/llm-context/US-9734272","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T04:10:53.521Z"}