{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9740614","patent":{"patent_number":"US-9740614","title":"Processor directly storing address range of co-processor memory accesses in a transactional memory where co-processor supplements functions of the processor","assignee":null,"inventors":[],"filing_date":"2014-06-27T00:00:00.000Z","publication_date":"2017-08-22T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F"],"num_claims":10,"abstract":"Monitoring, by a processor having a cache, addresses accessed by a co-processor associated with the processor during transactional execution of a transaction by the processor. The processor executes a transactional memory (TM) transaction, including receiving, by the processor, a memory address range of data that a co-processor may access to perform a co-processor operation. The processor saves the memory address range. Based on receiving, by the processor, a cache coherency request that conflicts with the saved address range, the processor aborts the TM transaction."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Processor directly storing address range of co-processor memory accesses in a transactional memory where co-processor supplements functions of the processor","description":"Monitoring, by a processor having a cache, addresses accessed by a co-processor associated with the processor during transactional execution of a transaction by the processor. The processor executes a","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9740614","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9740614","citation_suggestion":"Patentable. \"Processor directly storing address range of co-processor memory accesses in a transactional memory where co-processor supplements functions of the processor\" (US-9740614). https://patentable.app/patents/US-9740614","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9740614","json":"https://patentable.app/api/llm-context/US-9740614","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T09:22:13.127Z"}