{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9740657","patent":{"patent_number":"US-9740657","title":"Memory device for multiple processors and memory system having the same","assignee":null,"inventors":[],"filing_date":"2014-06-30T00:00:00.000Z","publication_date":"2017-08-22T00:00:00.000Z","cpc_codes":["G06F"],"num_claims":14,"abstract":"A memory device for multiple processors capable of processing a plurality of memory access requests and a memory system having the same are provided. The memory device includes one command and control signal port configured to receive a command and control signal from a memory controller, one address port configured to receive an address signal from the memory controller, a data port configured to form a plurality of data channels being independently driven to simultaneously process a plurality of memory access requests of the memory controller, and a plurality of memory banks divided into a plurality of sub-banks to simultaneously perform operations according to the plurality of memory access requests when the plurality of memory access requests are sequentially transmitted through the command and control signal port and the address port."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory device for multiple processors and memory system having the same","description":"A memory device for multiple processors capable of processing a plurality of memory access requests and a memory system having the same are provided. The memory device includes one command and control","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9740657","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9740657","citation_suggestion":"Patentable. \"Memory device for multiple processors and memory system having the same\" (US-9740657). https://patentable.app/patents/US-9740657","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9740657","json":"https://patentable.app/api/llm-context/US-9740657","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T12:19:19.604Z"}