{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9740813","patent":{"patent_number":"US-9740813","title":"Layout effect characterization for integrated circuits","assignee":null,"inventors":[],"filing_date":"2016-10-13T00:00:00.000Z","publication_date":"2017-08-22T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F"],"num_claims":15,"abstract":"An aspect includes forming a layout effect characterization circuit by incorporating a plurality of inverting device chains including a reference chain and one or more chains having a different inverting device arrangement and a same number of inverting devices per chain in an integrated circuit layout. A low pass filter is coupled to an output of the inverting device chains to produce a filtered output. An output capture circuit is coupled to the filtered output to enable a comparison of a captured filtered output of the one or more chains having the different inverting device arrangement to a captured filtered output of the reference chain."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Layout effect characterization for integrated circuits","description":"An aspect includes forming a layout effect characterization circuit by incorporating a plurality of inverting device chains including a reference chain and one or more chains having a different invert","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9740813","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9740813","citation_suggestion":"Patentable. \"Layout effect characterization for integrated circuits\" (US-9740813). https://patentable.app/patents/US-9740813","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9740813","json":"https://patentable.app/api/llm-context/US-9740813","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T07:20:32.496Z"}