{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9741428","patent":{"patent_number":"US-9741428","title":"Integrated circuit devices and methods","assignee":null,"inventors":[],"filing_date":"2016-04-21T00:00:00.000Z","publication_date":"2017-08-22T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":1,"abstract":"An integrated circuit can include multiple SRAM cells, each including at least two pull-up transistors, at least two pull-down transistors, and at least two pass-gate transistors, each of the transistors having a gate; at least one of the pull-up transistors, the pull-down transistors, or the pass-gate transistors having a screening region a distance below the gate and separated from the gate by a semiconductor layer, the screening region having a concentration of screening region dopants, the concentration of screening region dopants being higher than a concentration of dopants in the semiconductor layer, the screening region providing an enhanced body coefficient for the pull-down transistors and the pass-gate transistors to increase the read static noise margin for the SRAM cell when a bias voltage is applied to the screening region; and a bias voltage network operable to apply one or more bias voltages to the multiple SRAM cells."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Integrated circuit devices and methods","description":"An integrated circuit can include multiple SRAM cells, each including at least two pull-up transistors, at least two pull-down transistors, and at least two pass-gate transistors, each of the transist","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9741428","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9741428","citation_suggestion":"Patentable. \"Integrated circuit devices and methods\" (US-9741428). https://patentable.app/patents/US-9741428","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9741428","json":"https://patentable.app/api/llm-context/US-9741428","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T11:22:03.410Z"}