{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9741723","patent":{"patent_number":"US-9741723","title":"Semiconductor device having shallow trench isolation structure","assignee":null,"inventors":[],"filing_date":"2015-09-14T00:00:00.000Z","publication_date":"2017-08-22T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":13,"abstract":"A semiconductor device is provided, which prevents a case where the widths of word lines become uneven because of a stress developing at the border between a memory cell area and a peripheral circuit area. The semiconductor device 1 has a semiconductor substrate 2 on which a memory cell area MC defined by a peripheral isolation region 3c. The memory cell area MC has multiple cell active regions k defined by multiple cell isolation regions 3a, 3b. Guard active regions GLa, GLb made of the semiconductor substrate are disposed in the border between the memory cell area MC and the peripheral isolation region 3c to separate the memory cell isolation regions 3a, 3b from the peripheral isolation region 3c. "},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor device having shallow trench isolation structure","description":"A semiconductor device is provided, which prevents a case where the widths of word lines become uneven because of a stress developing at the border between a memory cell area and a peripheral circuit ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9741723","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9741723","citation_suggestion":"Patentable. \"Semiconductor device having shallow trench isolation structure\" (US-9741723). https://patentable.app/patents/US-9741723","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9741723","json":"https://patentable.app/api/llm-context/US-9741723","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T06:24:56.106Z"}