{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9741768","patent":{"patent_number":"US-9741768","title":"Controlling memory cell size in three dimensional nonvolatile memory","assignee":null,"inventors":[],"filing_date":"2016-03-31T00:00:00.000Z","publication_date":"2017-08-22T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":17,"abstract":"A method is provided that includes forming a vertical bit line disposed in a first direction above a substrate, forming a multi-layer word line disposed in a second direction above the substrate, the second direction perpendicular to the first direction, and forming a memory cell including a nonvolatile memory material at an intersection of the vertical bit line and the multi-layer word line. The multi-layer word line includes a first conductive material layer and a second conductive material layer disposed above the first conductive material layer. The memory cell includes a working cell area encompassed by an intersection of the first conductive material layer and the nonvolatile memory material."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Controlling memory cell size in three dimensional nonvolatile memory","description":"A method is provided that includes forming a vertical bit line disposed in a first direction above a substrate, forming a multi-layer word line disposed in a second direction above the substrate, the ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9741768","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9741768","citation_suggestion":"Patentable. \"Controlling memory cell size in three dimensional nonvolatile memory\" (US-9741768). https://patentable.app/patents/US-9741768","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9741768","json":"https://patentable.app/api/llm-context/US-9741768","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T05:20:40.741Z"}