{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9741870","patent":{"patent_number":"US-9741870","title":"Systems and methods for CMOS-integrated junction field effect transistors for dense and low-noise bioelectronic platforms","assignee":null,"inventors":[],"filing_date":"2015-04-08T00:00:00.000Z","publication_date":"2017-08-22T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":14,"abstract":"A complementary metal oxide semiconductor (CMOS)-integrated junction field effect transistor (JFET) has reduced scale and reduced noise. An exemplary JFET has a substrate layer of one dopant type with a gate layer of that dopant type disposed on the substrate, a depletion channel of a second dopant type disposed on the first gate layer, and a second gate layer of the first dopant type disposed on the depletion channel and proximate a surface of the transistor. The second gate layer can separate the depletion channel from the surface, and the depletion channel separates the first gate layer from the second gate layer."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Systems and methods for CMOS-integrated junction field effect transistors for dense and low-noise bioelectronic platforms","description":"A complementary metal oxide semiconductor (CMOS)-integrated junction field effect transistor (JFET) has reduced scale and reduced noise. An exemplary JFET has a substrate layer of one dopant type with","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9741870","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9741870","citation_suggestion":"Patentable. \"Systems and methods for CMOS-integrated junction field effect transistors for dense and low-noise bioelectronic platforms\" (US-9741870). https://patentable.app/patents/US-9741870","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9741870","json":"https://patentable.app/api/llm-context/US-9741870","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T08:04:40.347Z"}