{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9746400","patent":{"patent_number":"US-9746400","title":"Method for evaluating semiconductor wafer and apparatus for evaluating semiconductor wafer","assignee":null,"inventors":[],"filing_date":"2013-04-15T00:00:00.000Z","publication_date":"2017-08-29T00:00:00.000Z","cpc_codes":["G01N","G01N","H01L","G01N","G01N","G01N","G01N","G01N","G01N"],"num_claims":24,"abstract":"The present invention provides a method for evaluating a semiconductor wafer concerning a breaking strength of a notch portion of the semiconductor wafer, comprising: applying a load to a notch portion of the semiconductor wafer to be evaluated toward the center of the wafer such that the notch portion of the semiconductor wafer is broken; and evaluating the breaking strength of the notch portion. The present invention provides a method and an apparatus for evaluating a semiconductor wafer that can evaluate the breaking strength of a notch portion of a semiconductor wafer with higher precision and higher sensitivity."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method for evaluating semiconductor wafer and apparatus for evaluating semiconductor wafer","description":"The present invention provides a method for evaluating a semiconductor wafer concerning a breaking strength of a notch portion of the semiconductor wafer, comprising: applying a load to a notch portio","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9746400","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9746400","citation_suggestion":"Patentable. \"Method for evaluating semiconductor wafer and apparatus for evaluating semiconductor wafer\" (US-9746400). https://patentable.app/patents/US-9746400","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9746400","json":"https://patentable.app/api/llm-context/US-9746400","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T15:32:20.165Z"}