{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9747959","patent":{"patent_number":"US-9747959","title":"Stacked memory devices, and memory packages and memory systems having the same","assignee":null,"inventors":[],"filing_date":"2016-11-21T00:00:00.000Z","publication_date":"2017-08-29T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":20,"abstract":"A stacked memory device includes a master semiconductor die and a plurality of slave semiconductor dies stacked on the master semiconductor die. The master semiconductor die includes a first power line coupled to a first power supply voltage, a second power line coupled to a second power supply voltage, a memory device coupled to the first power line, and a data input/output buffer coupled to the second power line. Each of the plurality of slave semiconductor dies includes third and fourth power lines and a memory device coupled to the third power line. The third power line is electrically connected to the first and fourth power lines, and the fourth power line is electrically disconnected from the second power line. The data input/output buffer buffers data communicated between an external device and the memory devices included in the master semiconductor die and the plurality of slave semiconductor dies."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Stacked memory devices, and memory packages and memory systems having the same","description":"A stacked memory device includes a master semiconductor die and a plurality of slave semiconductor dies stacked on the master semiconductor die. The master semiconductor die includes a first power lin","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9747959","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9747959","citation_suggestion":"Patentable. \"Stacked memory devices, and memory packages and memory systems having the same\" (US-9747959). https://patentable.app/patents/US-9747959","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9747959","json":"https://patentable.app/api/llm-context/US-9747959","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T11:22:54.120Z"}