{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9748338","patent":{"patent_number":"US-9748338","title":"Preventing isolation leakage in III-V devices","assignee":null,"inventors":[],"filing_date":"2012-06-29T00:00:00.000Z","publication_date":"2017-08-29T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":11,"abstract":"A fin is formed over a first barrier layer over a substrate. The first barrier layer has a band gap greater than the band gap of the fin. In one embodiment, a gate dielectric layer is deposited on the top surface and opposing sidewalls of the fin and is adjacent to a second barrier layer deposited on the first barrier layer underneath the fin. In one embodiment, the gate dielectric layer is deposited on the top surface and the opposing sidewalls of the fin and an isolating layer is formed adjacent to the first barrier layer underneath the fin. In one embodiment, the gate dielectric layer is deposited on the top surface and the opposing sidewalls of the fin, and an isolating layer is formed adjacent to the second barrier layer deposited between the fin and the first barrier layer."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Preventing isolation leakage in III-V devices","description":"A fin is formed over a first barrier layer over a substrate. The first barrier layer has a band gap greater than the band gap of the fin. In one embodiment, a gate dielectric layer is deposited on the","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9748338","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9748338","citation_suggestion":"Patentable. \"Preventing isolation leakage in III-V devices\" (US-9748338). https://patentable.app/patents/US-9748338","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9748338","json":"https://patentable.app/api/llm-context/US-9748338","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T06:41:12.767Z"}