{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9754063","patent":{"patent_number":"US-9754063","title":"Reducing dynamic clock skew and/or slew in an electronic circuit","assignee":null,"inventors":[],"filing_date":"2015-11-16T00:00:00.000Z","publication_date":"2017-09-05T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F"],"num_claims":20,"abstract":"Reducing dynamic clock skew and/or slew in an electronic circuit is provided by: referencing a layout database and/or netlist of a design for the electronic circuit; identifying a set of neighboring buffer pairs with active buffers and adjacent sub-meshes, which are connected by a shorting bar; for each neighboring buffer pair of the set: placing a dummy buffer for each of their active buffers in the adjacent sub-meshes close to the active buffers; routing an input of a first dummy buffer located in a first sub-mesh to an output of an active buffer in a second sub-mesh; routing an input of a second dummy buffer located in the second sub-mesh to an output of an active buffer in the first sub-mesh; and connecting inputs of the first and second dummy buffers to the shorting bar."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Reducing dynamic clock skew and/or slew in an electronic circuit","description":"Reducing dynamic clock skew and/or slew in an electronic circuit is provided by: referencing a layout database and/or netlist of a design for the electronic circuit; identifying a set of neighboring b","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9754063","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9754063","citation_suggestion":"Patentable. \"Reducing dynamic clock skew and/or slew in an electronic circuit\" (US-9754063). https://patentable.app/patents/US-9754063","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9754063","json":"https://patentable.app/api/llm-context/US-9754063","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T10:11:44.064Z"}