{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9754895","patent":{"patent_number":"US-9754895","title":"Methods of forming semiconductor devices including determining misregistration between semiconductor levels and related apparatuses","assignee":null,"inventors":[],"filing_date":"2016-03-07T00:00:00.000Z","publication_date":"2017-09-05T00:00:00.000Z","cpc_codes":["H01L","G06T","G06T","G06T","G06T","H01L","H01L","H01L","H01L","H01L","H01L","H01L","G06T","G06T","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":25,"abstract":"A method of determining a lateral misregistration between levels of a semiconductor structure comprises imaging at least one first alignment mark in a first level of the structure and at least one second alignment mark in a second level of the structure. A digital image of the first and second alignment marks is formed, each of which are defined by a set of points having an x-value and a y-value. The x-values and y-values of points defining the first alignment mark and points defining the second alignment mark are averaged to determine a center of the first alignment mark and a center of the second alignment mark. An x-coordinate and a y-coordinate of the center of the first alignment mark is subtracted from the respective x-coordinate and y-coordinate of the center of the second alignment mark to determine a lateral misregistration between the first level and the second level. Related methods of forming a semiconductor wafer, semiconductor assembles and metrology tools for use in implementing the methods are disclosed."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Methods of forming semiconductor devices including determining misregistration between semiconductor levels and related apparatuses","description":"A method of determining a lateral misregistration between levels of a semiconductor structure comprises imaging at least one first alignment mark in a first level of the structure and at least one sec","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9754895","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9754895","citation_suggestion":"Patentable. \"Methods of forming semiconductor devices including determining misregistration between semiconductor levels and related apparatuses\" (US-9754895). https://patentable.app/patents/US-9754895","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9754895","json":"https://patentable.app/api/llm-context/US-9754895","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T09:00:35.849Z"}