{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9755026","patent":{"patent_number":"US-9755026","title":"Method of manufacturing semiconductor device","assignee":null,"inventors":[],"filing_date":"2016-04-19T00:00:00.000Z","publication_date":"2017-09-05T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L"],"num_claims":20,"abstract":"A method of forming a semiconductor device includes forming a sacrificial gate pattern on an active pattern, forming spacers on opposite sidewalls of the sacrificial gate pattern, forming an interlayer insulating layer on the active pattern and the spacers, removing the sacrificial gate pattern to form a gate trench that exposes a region of the active pattern, forming a gate dielectric layer on the region of the active pattern exposed by the gate trench, performing a first heat treatment at a pressure of less than 1 atm to remove impurities in the interlayer insulating layer, performing a second heat treatment on the gate dielectric layer at a temperature greater than a temperature of the first heat treatment, and forming a gate electrode in the gate trench."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method of manufacturing semiconductor device","description":"A method of forming a semiconductor device includes forming a sacrificial gate pattern on an active pattern, forming spacers on opposite sidewalls of the sacrificial gate pattern, forming an interlaye","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9755026","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9755026","citation_suggestion":"Patentable. \"Method of manufacturing semiconductor device\" (US-9755026). https://patentable.app/patents/US-9755026","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9755026","json":"https://patentable.app/api/llm-context/US-9755026","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T11:17:38.699Z"}