{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9755646","patent":{"patent_number":"US-9755646","title":"Input/output buffer circuit for avoiding malfunctioning in processing signals","assignee":null,"inventors":[],"filing_date":"2016-01-31T00:00:00.000Z","publication_date":"2017-09-05T00:00:00.000Z","cpc_codes":["G11C","G11C"],"num_claims":14,"abstract":"An input/output (I/O) buffer circuit includes an I/O unit, a first register and a second register. The I/O unit selectively transmits digital signals and analog signals according to a first enable signal, and selectively receives signals and outputs signals at an I/O terminal according to a second enable signal. The first register latches a first control signal received before power is turned off, and outputs the first enable signal corresponding to the first control signal to the I/O unit when power is turned on. The second register latches a second control signal received before power is turned off, and outputs the second enable signal corresponding to the second control signal to the I/O unit when power is turned on."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Input/output buffer circuit for avoiding malfunctioning in processing signals","description":"An input/output (I/O) buffer circuit includes an I/O unit, a first register and a second register. The I/O unit selectively transmits digital signals and analog signals according to a first enable sig","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9755646","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9755646","citation_suggestion":"Patentable. \"Input/output buffer circuit for avoiding malfunctioning in processing signals\" (US-9755646). https://patentable.app/patents/US-9755646","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9755646","json":"https://patentable.app/api/llm-context/US-9755646","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T12:35:51.341Z"}