{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9760356","patent":{"patent_number":"US-9760356","title":"Loop nest parallelization without loop linearization","assignee":null,"inventors":[],"filing_date":"2014-09-23T00:00:00.000Z","publication_date":"2017-09-12T00:00:00.000Z","cpc_codes":["G06F"],"num_claims":18,"abstract":"Systems and methods may provide for identifying a nested loop iteration space in user code, wherein the nested loop iteration space includes a plurality of outer loop iterations, and distributing iterations from the nested loop iteration space across a plurality of threads, wherein each thread is assigned a group of outer loop iterations. Additionally, a compiler output may be automatically generated, wherein the compiler output contains serial code corresponding to each group of outer loop iterations and de-linearization code to be executed outside the plurality of outer loop iterations. In one example, the de-linearization code includes index recovery code that is positioned before one or more instances of the serial code in the compiler output."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Loop nest parallelization without loop linearization","description":"Systems and methods may provide for identifying a nested loop iteration space in user code, wherein the nested loop iteration space includes a plurality of outer loop iterations, and distributing iter","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9760356","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9760356","citation_suggestion":"Patentable. \"Loop nest parallelization without loop linearization\" (US-9760356). https://patentable.app/patents/US-9760356","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9760356","json":"https://patentable.app/api/llm-context/US-9760356","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T06:59:53.784Z"}