{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9761481","patent":{"patent_number":"US-9761481","title":"Integrated circuits and methods of forming the same with metal layer connection to through-semiconductor via","assignee":null,"inventors":[],"filing_date":"2013-01-23T00:00:00.000Z","publication_date":"2017-09-12T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L"],"num_claims":7,"abstract":"Integrated circuits and methods of forming integrated circuits are provided herein, in which a plurality of semiconductor devices is formed on a semiconductor substrate. At least one through-semiconductor via is formed in the semiconductor substrate and an interlayer dielectric layer is formed overlying the at least one through-semiconductor via and the plurality of semiconductor devices. A first pattern is etched in the interlayer dielectric layer over the at least one through-semiconductor via, and a second pattern different from the first pattern is etched in the interlayer dielectric layer over the same through-semiconductor via as the first pattern. At least one interconnect via is embedded within the interlayer dielectric layer, in electrical communication with one of the at least one through-semiconductor vias. A metal-containing material is deposited in the first pattern and the second pattern to form a first metal layer in electrical communication with the at least one interconnect via."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Integrated circuits and methods of forming the same with metal layer connection to through-semiconductor via","description":"Integrated circuits and methods of forming integrated circuits are provided herein, in which a plurality of semiconductor devices is formed on a semiconductor substrate. At least one through-semicondu","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9761481","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9761481","citation_suggestion":"Patentable. \"Integrated circuits and methods of forming the same with metal layer connection to through-semiconductor via\" (US-9761481). https://patentable.app/patents/US-9761481","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9761481","json":"https://patentable.app/api/llm-context/US-9761481","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T09:17:02.471Z"}