{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9761482","patent":{"patent_number":"US-9761482","title":"Enhancement of iso-via reliability","assignee":null,"inventors":[],"filing_date":"2015-08-25T00:00:00.000Z","publication_date":"2017-09-12T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":8,"abstract":"A process of making a semiconductor structure. The process includes forming a wiring line; forming a reliability enhancement material on the wiring line; forming an interlayer dielectric (ILD) layer on the wiring line; forming a via opening through the ILD layer and reliability enhancement material to expose a surface of the wiring line; and filling the via opening with a metal to form a metal-filled via in contact with the wiring line wherein the reliability enhancement material is in direct contact with the metal-filled via; wherein the reliability enhancement material causes a compressive stress on the metal-filled via where it contacts the wiring line. Another embodiment includes the metal-filled via being an iso-via so that there is only one metal-filled via per wiring line."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Enhancement of iso-via reliability","description":"A process of making a semiconductor structure. The process includes forming a wiring line; forming a reliability enhancement material on the wiring line; forming an interlayer dielectric (ILD) layer o","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9761482","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9761482","citation_suggestion":"Patentable. \"Enhancement of iso-via reliability\" (US-9761482). https://patentable.app/patents/US-9761482","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9761482","json":"https://patentable.app/api/llm-context/US-9761482","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T13:15:45.143Z"}