{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9761551","patent":{"patent_number":"US-9761551","title":"Solder joint structure for ball grid array in wafer level package","assignee":null,"inventors":[],"filing_date":"2016-02-15T00:00:00.000Z","publication_date":"2017-09-12T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":20,"abstract":"A semiconductor device package and a method for forming the same using an improved solder joint structure are disclosure. The package includes solder joints having a thinner bottom portion than a top portion. The bottom portion is surrounded by a molding compound and the top portion is not surrounded by a molding compound. The method includes depositing and forming a liquid molding compound around an intermediate solder joint using release film, and then etching the molding compound to a reduced height. The resulting solder joint has no waist at the interface of the molding compound and the solder joint. The molding compound has a greater roughness after the etch, greater than about 3 microns, than the molding compound as formed."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Solder joint structure for ball grid array in wafer level package","description":"A semiconductor device package and a method for forming the same using an improved solder joint structure are disclosure. The package includes solder joints having a thinner bottom portion than a top ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9761551","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9761551","citation_suggestion":"Patentable. \"Solder joint structure for ball grid array in wafer level package\" (US-9761551). https://patentable.app/patents/US-9761551","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9761551","json":"https://patentable.app/api/llm-context/US-9761551","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T04:09:35.799Z"}