{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9761564","patent":{"patent_number":"US-9761564","title":"Layout of transmission vias for memory device","assignee":null,"inventors":[],"filing_date":"2016-06-30T00:00:00.000Z","publication_date":"2017-09-12T00:00:00.000Z","cpc_codes":["H01L","G11C","G11C","H01L","H01L","H01L","G11C","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":19,"abstract":"Apparatuses and methods for supplying power to a plurality of dies are described. An example apparatus includes: a substrate; first, second and third memory cell arrays arranged in line in a first direction in the substrate; a first set of through electrodes arranged between the first and second memory cell arrays, each of the first set of through electrodes penetrating through the substrate, the first set of through electrodes including first and second through electrodes; and a second set of through electrodes arranged between the second and third memory cell arrays, each of the second set of through electrodes penetrating through the substrate, the second set of through electrodes including third and fourth through electrodes."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Layout of transmission vias for memory device","description":"Apparatuses and methods for supplying power to a plurality of dies are described. An example apparatus includes: a substrate; first, second and third memory cell arrays arranged in line in a first dir","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9761564","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9761564","citation_suggestion":"Patentable. \"Layout of transmission vias for memory device\" (US-9761564). https://patentable.app/patents/US-9761564","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9761564","json":"https://patentable.app/api/llm-context/US-9761564","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T03:52:03.840Z"}