{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9767906","patent":{"patent_number":"US-9767906","title":"Semiconductor memory device including three-dimensional array structure and memory system including the same","assignee":null,"inventors":[],"filing_date":"2016-02-10T00:00:00.000Z","publication_date":"2017-09-19T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C"],"num_claims":19,"abstract":"A semiconductor memory device may include first and second sub-cell strings. The first sub-cell string may be coupled to a common source line at an end of the first sub-cell string. The first sub-cell string may have a first group of normal memory cells and at least one source-side middle dummy memory cell coupled to the first sub-cell string and the first group of the normal memory cells. The second sub-cell string may be coupled to a bit line at an end of the second sub-cell string. The second sub-cell string may have a second group of normal memory cells and drain-side middle dummy memory cells coupled to the second group the normal memory cells. The number of the drain-side middle dummy memory cells may be greater than the number of the at least one source-side middle dummy memory cell."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor memory device including three-dimensional array structure and memory system including the same","description":"A semiconductor memory device may include first and second sub-cell strings. The first sub-cell string may be coupled to a common source line at an end of the first sub-cell string. The first sub-cell","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9767906","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9767906","citation_suggestion":"Patentable. \"Semiconductor memory device including three-dimensional array structure and memory system including the same\" (US-9767906). https://patentable.app/patents/US-9767906","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9767906","json":"https://patentable.app/api/llm-context/US-9767906","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T09:00:03.093Z"}