{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9767920","patent":{"patent_number":"US-9767920","title":"Semiconductor memory devices and memory systems including the same","assignee":null,"inventors":[],"filing_date":"2015-07-14T00:00:00.000Z","publication_date":"2017-09-19T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"A semiconductor memory device includes a memory cell array, an input/output (I/O) gating circuit, an error decision circuit and an error check and correction (ECC) circuit. The I/O gating circuit reads test pattern data to provide test result data in a test mode and reads a codeword in a normal mode. The error decision circuit determines the correctability of errors in the test result data by a first unit, based on the test pattern data and the test result data and provides a first error kind signal indicating a first determination result, in the test mode. The ECC circuit decodes the codeword including main data and parity data generated based on the main data, determines correctability of errors in the codeword by a second unit and provides a second error kind signal indicating a second determination result, in the normal mode. The main data includes a plurality of unit data."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor memory devices and memory systems including the same","description":"A semiconductor memory device includes a memory cell array, an input/output (I/O) gating circuit, an error decision circuit and an error check and correction (ECC) circuit. The I/O gating circuit read","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9767920","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9767920","citation_suggestion":"Patentable. \"Semiconductor memory devices and memory systems including the same\" (US-9767920). https://patentable.app/patents/US-9767920","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9767920","json":"https://patentable.app/api/llm-context/US-9767920","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T11:40:19.102Z"}