{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9772900","patent":{"patent_number":"US-9772900","title":"Tiered ECC single-chip and double-chip Chipkill scheme","assignee":null,"inventors":[],"filing_date":"2015-01-27T00:00:00.000Z","publication_date":"2017-09-26T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":16,"abstract":"Exemplary embodiments provide a tiered error correction code (ECC) Chipkill system, comprising: a device ECC incorporated into at least a portion of a plurality of memory devices that corrects n-bit memory device-level failures in the respective memory device, and transmits a memory device failure signal when any memory device-level failure is greater than n-bits and beyond correction capability of the device ECC device; and a system-level ECC device external to the plurality of memory devices is responsive to receiving the memory device failure signal to correct the memory device failure based on a system ECC parity."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Tiered ECC single-chip and double-chip Chipkill scheme","description":"Exemplary embodiments provide a tiered error correction code (ECC) Chipkill system, comprising: a device ECC incorporated into at least a portion of a plurality of memory devices that corrects n-bit m","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9772900","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9772900","citation_suggestion":"Patentable. \"Tiered ECC single-chip and double-chip Chipkill scheme\" (US-9772900). https://patentable.app/patents/US-9772900","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9772900","json":"https://patentable.app/api/llm-context/US-9772900","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T11:46:06.992Z"}