{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9780018","patent":{"patent_number":"US-9780018","title":"Power semiconductor package having reduced form factor and increased current carrying capability","assignee":null,"inventors":[],"filing_date":"2015-10-23T00:00:00.000Z","publication_date":"2017-10-03T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":20,"abstract":"A power semiconductor package is disclosed. The power semiconductor package includes a leadframe having partially etched segments and at least one non-etched segment, a first semiconductor die having a first power transistor and a driver integrated circuit (IC) monolithically formed thereon, a second semiconductor die having a second power transistor, wherein the first semiconductor die and the second semiconductor die are configured for attachment to the partially etched segments, and wherein the partially etched segments and the at least one non-etched segment enable the first semiconductor die to be coupled to the second semiconductor die by a legless conductive clip."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Power semiconductor package having reduced form factor and increased current carrying capability","description":"A power semiconductor package is disclosed. The power semiconductor package includes a leadframe having partially etched segments and at least one non-etched segment, a first semiconductor die having ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9780018","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9780018","citation_suggestion":"Patentable. \"Power semiconductor package having reduced form factor and increased current carrying capability\" (US-9780018). https://patentable.app/patents/US-9780018","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9780018","json":"https://patentable.app/api/llm-context/US-9780018","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T06:09:24.962Z"}