{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9780200","patent":{"patent_number":"US-9780200","title":"Semiconductor arrangement for a FinFET and method for manufacturing the same","assignee":null,"inventors":[],"filing_date":"2014-01-16T00:00:00.000Z","publication_date":"2017-10-03T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L"],"num_claims":8,"abstract":"A semiconductor arrangement and a method for manufacturing the same. An arrangement may include a bulk semiconductor substrate; a fin formed on the substrate; a first FinFET and a second FinFET formed on the substrate. The first FinFET comprises a first gate stack intersecting the fin and a first gate spacer disposed on sidewalls of the first gate stack. The second FinFET includes a second gate stack intersecting the fin and a second gate spacer disposed on sidewalls of the second gate stack; a dummy gate spacer formed between the first FinFET and the second FinFET and intersecting the fin; an isolation section self-aligned to a space defined by the dummy gate spacer. The isolation section electrically isolates the first FinFET from the second FinFET; and an insulation layer disposed under and abutting the isolation section."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor arrangement for a FinFET and method for manufacturing the same","description":"A semiconductor arrangement and a method for manufacturing the same. An arrangement may include a bulk semiconductor substrate; a fin formed on the substrate; a first FinFET and a second FinFET formed","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9780200","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9780200","citation_suggestion":"Patentable. \"Semiconductor arrangement for a FinFET and method for manufacturing the same\" (US-9780200). https://patentable.app/patents/US-9780200","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9780200","json":"https://patentable.app/api/llm-context/US-9780200","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T08:20:17.494Z"}